Silicon carbide has dielectric breakdown field strength of ten times as large as that of silicon and, like silicon, silicon carbide can be subjected to thermal oxidation. Therefore, silicon carbide attracts attention as the next generation of semiconductor materials. In particular, application to power conversion elements is desirable, and power transistors with high voltage resistance and low loss that use silicon carbide as a material have recently been proposed. It is necessary to decrease on-resistance in order to decrease the loss of a power transistor, and a power transistor that can effectively decrease on-resistance is desired. Therefore, there is known a semiconductor device in which a hetero-semiconductor region composed of polycrystalline silicon and having a band gap different from that of silicon carbide is formed in contact with a predetermined region of a first main surface of a high-concentration N-type silicon carbide semiconductor substrate on which an N-type silicon carbide epitaxial layer having a lower impurity concentration than that of the silicon carbide substrate is formed from, for example, Japanese Unexamined Patent Application Publication No. 2003-318398.
In this semiconductor device, the silicon carbide epitaxial layer is hetero-joined to the hetero-semiconductor region. In addition, a gate electrode is formed, through a gate insulating film, adjacent to the hetero-junction between the silicon carbide epitaxial layer and the hetero-semiconductor region. A source electrode is formed in contact with the hetero-semiconductor region. Also, a drain electrode is formed in contact with the silicon carbide substrate, i.e., in contact with the silicon carbide semiconductor substrate. Further, the source electrode and the gate electrode are electrically insulated from each other through an interlayer insulating film. As a result, the semiconductor device functions as a field effect transistor. The barrier height of the hetero-junction between the hetero-semiconductor region and the silicon carbide epitaxial layer is changed using an electric field from the gate electrode to perform a switching operation. Therefore, the on-resistance can be decreased because of no voltage drop in the channel region. Also, when a high voltage is applied between the source electrode and the drain electrode, an electric field is terminated in an accumulation layer formed on the hetero-semiconductor region side of the hetero-junction interface, and thus breakdown does not occur in the hetero-semiconductor region, thereby securing high voltage resistance between the source electrode and the drain electrode.